Abstract
Conference Title: 2015 IEEE International Solid- State Circuits Conference - (ISSCC) Conference Start Date: 2015, Feb. 22 Conference End Date: 2015, Feb. 26 Conference Location: San Francisco, CA, USA Wideband power amplifiers (PAs) with high power-added efficiency (PAE) are required by software-defined radio and high-data-rate communications. A PA in Class-AB, which can provide linear amplification with PAE better than Class-A, has been reported in [1] to achieve bandwidth larger than one octave. However, Class-AB operation generates a large amount of 2nd-harmonic current at the transistor output, which has amplitude as high as up to 42% of the fundamental current in theory [2]. An output matching network, providing optimum load impedance only at the fundamental frequency, is insufficient to achieve good power performance, bringing big challenges to integrated Class-AB PA design with octave bandwidth. In this work, we demonstrate a 2-to-6GHz (fractional bandwidth of 115.5%) Class-AB PA designed in 65nm CMOS. An output matching technique based on differential architecture, which enables the PA to achieve a maximum PAE of 28.4% and an overall PAE above 19%, is proposed to provide transistor output with optimum load impedance for both fundamental and 2nd harmonic over an octave bandwidth. Without using any pre-distortion, the PA can deliver output power of 9.31 to 11.31dBm with EVM<-32dB for 256QAM signal (802.11ac format, 20MHz bandwidth) from 2 to 6GHz.