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A 1-V 32-µW 13-bit CMOS Sigma-Delta A/D converter for biomedical applications
Conference proceeding

A 1-V 32-µW 13-bit CMOS Sigma-Delta A/D converter for biomedical applications

K. Muthusamy, T. Hui Teo, Yong Ping Xu and Tee Hui Teo
2009 IEEE 8th International Conference on ASIC, pp.207-210
10/2009
DOI: https://doi.org/10.1109/ASICON.2009.5351498

Abstract

A/D converter Analog-digital conversion Circuits CMOS technology Delta-sigma modulation digital filter Digital filters Digital modulation Dynamic range Frequency Low voltage operational amplifier Operational amplifiers Sigma-delta modulator
This paper describes a low power, low voltage sigma-delta analog to digital converter which consists of a sigma-delta modulator (SDM) and a decimation digital filter. A power efficient class AB OP-AMP, derived from inverter-like amplifier circuit, is proposed and a modified digital filter structure is employed for low frequency operation. Designed in a 0.18-μm CMOS technology, the overall SD-ADC is able to achieve an ENOB of 13.4 bit, a dynamic range of 88.6 dB and a peak SNR of 82.7 dB. The total power consumption of the ADC is 32 μW.

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