Logo image
A 9-to-13.5 GHz 29.2-dBm- PSAT 44.4%-PAE Power Amplifier Using Extended Cascode Cores and 4-to-1 Folded Transformers in 130-nm CMOS SOI
Conference proceeding

A 9-to-13.5 GHz 29.2-dBm- PSAT 44.4%-PAE Power Amplifier Using Extended Cascode Cores and 4-to-1 Folded Transformers in 130-nm CMOS SOI

Yiting Zhang, Nengxu Zhu, Fanyi Meng and IEEE
IEEE MTT-S International Microwave Symposium digest, pp.568-571
15/06/2025

Abstract

4-to-1 folded transformer (4-to-1 FT) Circuit faults CMOS SOI Density measurement extended cascode core (ECC) power amplifier (PA) Power amplifiers Power generation Power system measurements Transformer cores Transistors Voltage Wideband Wireless communication X-/Ku-band
This paper presents an X-/Ku-band 8-way power amplifier (PA) utilizing extended cascode cores (ECCs) and output 4-to-1 folded transformers (FTs) to obtain highefficiency/linearity/power density. The ECC introduces a common-gate (CG) transistor with gate bias fixed on top of the conventional cascode, in combination with a well-designed drain voltage waveform distribution across the transistors, which provides a higher voltage gain/output impedance compared to stacked-FET designs. The 4-to-1 FT efficiently combines fourway ECCs with triple-coupled routing, offering low loss and wideband performance due to its high-order bandpass characteristics. Fabricated in SMIC 130-nm CMOS SOI technology, the PA achieves a 3-dB bandwidth from 9.0 to 13.5 GHz, a saturated output power of 29.2 dBm, and a peak poweradded efficiency of 44.4%. The core area is 0.697 mm 2 , corresponding to a 1193.3 mW/mm 2 power density. The PA supports 64-QAM 250 MSym/s signal modulation with 23.5-dBm average output power, demonstrating an EVMrms/ACLR of below −25 dB/−31 dBc.

Metrics

1 Record Views

Details

Logo image