Abstract
Techniques such as the Positive-Up-Negative-Down (PUND) and Dynamic Leakage Current Compensation (DLCC) are often used to isolate the Ferroelectric (FE) switching component from other current artifacts during the characterization of FE memory devices, with DLCC being able to compensate for a wider range of measurement artifacts. An evaluation of both techniques was carried out in the context of leaky and non-leaky samples. However, it was observed that both PUND and DLCC were unable to fully compensate for large amounts of leakage currents in very leaky samples ( <1 ~\mathrm{A} / \text{cm}^{2} at 3 \text{MV} / \text{cm} applied voltage). In doing so, this work aims to showcase some of the resultant signatures of inadequate compensation in the I-V plots and P-V hysteresis loops, highlighting the need for more sophisticated current compensation methodologies.