Logo image
A Gm3 cancellation bias for 60GHz Doherty Power Amplifier
Conference proceeding

A Gm3 cancellation bias for 60GHz Doherty Power Amplifier

Aaron Tan, Kaixue Ma, Zhi Hui Kong and Kiat Seng Yeo
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Conference Proceedings, p.195
01/01/2015

Abstract

Conference Title: 2015 International SoC Design Conference (ISOCC) Conference Start Date: 2015, Nov. 2 Conference End Date: 2015, Nov. 5 Conference Location: Gyungju, South Korea We present a 60GHz CMOS Doherty Power Amplifier (DPA) with a proposed wideband broadside coupler and a phase-shifter to adjust the phase difference between the two paths. The DPA achieves a gain of 8.5dB under a supply voltage of 1.2V, which allows the saturated output power to be about 14.5dBm. A peak PAE of 11% and output compression point of 10.8dBm were exhibited. Comparing to a balance power amplifier, the IMD3 improvement is approximately 9dB. The proposed design achieves the highest Figure of Merit (FoM) as compared to state of the art 60GHz DPA in CMOS process.

Metrics

1 Record Views

Details

Logo image