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A Low Noise Amplifier in 130 nm SOI CMOS for ISM Applications
Conference proceeding

A Low Noise Amplifier in 130 nm SOI CMOS for ISM Applications

Jiang-An Han, Zhi-Hui Kong, Bo Yu, Wan-Lan Yang, Kaixue Ma, Kiat Seng Yeo and IEEE
International SoC Design Conference, pp.203-204
International SoC Design Conference
01/01/2015

Abstract

Computer Science Computer Science, Cybernetics Computer Science, Theory & Methods Science & Technology Technology
This paper introduces design and implementation of microwave low noise amplifier (LNA) in 130 nm SOI CMOS technology. The LNA operating around 5.8 GHz is design for ISM 5.8GHz applications. In schematic design, the CMOS transistors are stacked for compact size. In layout verification, all inductors are verified by 3D electromagnetic simulator. The fabricated chip has achieved 7.0 gain and 3.1 dB noise figure in measurement. The size of this chip is only about 0.58 0.32 mm(2).

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