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A Low Power Fully Programmable 1MHz Resolution 2.4GHz CMOS PLL Frequency Synthesizer
Conference proceeding

A Low Power Fully Programmable 1MHz Resolution 2.4GHz CMOS PLL Frequency Synthesizer

M. Vamshi Krishna, J. Xie, W.M. Lim, M.A. Do, K.S. Yeo, C.C. Boon and IEEE
2007 IEEE Biomedical Circuits and Systems Conference, pp.187-190
01/01/2007
DOI: https://doi.org/10.1109/BIOCAS.2007.4463340

Abstract

CMOS digital integrated circuits Digital circuits Energy consumption Flip-flops Frequency conversion Frequency Synthesizer Frequency synthesizers Fully Programmable high resolution low power Phase locked loops Radio frequency Transceivers Voltage-controlled oscillators
This paper presents a low power, high resolution 2.4 GHz CMOS frequency synthesizer for low power wireless LAN applications. The PLL frequency synthesizer consists of a fully programmable frequency divider with a resolution of 1 MHz in the range of 2.4 GHz-2.484 GHz.The measured results showed that the programmable divider consumes 946 uA and Quadrature VCO consumes 1.57 mA and produces output swing of 650-700 mVpp. The complete synthesizer is designed using the Chartered RF 0.18 um process and synthesizer consumes 2.7 mA.

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