Abstract
A low noise amplifier (LNA) with excellent gain flatness operating at the frequency range of 5.1 GHz to 5.9 GHz is designed using a 0.18 /spl mu/m CMOS process. From a supply voltage of 1.5 V, the two-stage cascode LNA exhibits a minimum noise figure (NF/sub min/) of 2.59 dB to 3.13 dB within the required bandwidth. The LNA has a S/sub 11/ and S/sub 22/ of -25 dB and -27 dB at 5.5 GHz respectively. A reversed isolation (S/sub 12/) of 100 dB was achieved. A power gain (S/sub 21/) of 14.6 dB with variations less than /spl plusmn/ 0.4% was obtained within 5.1 GHz and 5.9 GHz. Input IP3 and 1 dB compression points of the LNA are -9.05 dBm and -17.12 dBm respectively.