Logo image
Accelerating Sparse Deep Neural Networks on FPGAs
Conference proceeding

Accelerating Sparse Deep Neural Networks on FPGAs

Sitao Huang, Carl Pearson, Rakesh Nagi, Jinjun Xiong, Deming Chen, Wen-mei Hwu and IEEE
IEEE Conference on High Performance Extreme Computing (Online), pp.1-7
IEEE High Performance Extreme Computing Conference
01/01/2019

Abstract

Computer Science Computer Science, Hardware & Architecture Computer Science, Theory & Methods Engineering Engineering, Electrical & Electronic Science & Technology Technology
Deep neural networks (DNNs) have been widely adopted in many domains, including computer vision, natural language processing, and medical care. Recent research reveals that sparsity in DNN parameters can be exploited to reduce inference computational complexity and improve network quality. However, sparsity also introduces irregularity and extra complexity in data processing, which make the accelerator design challenging. This work presents the design and implementation of a highly flexible sparse DNN inference accelerator on FPGA. Our proposed inference engine can be easily configured to be used in both mobile computing and high-performance computing scenarios. Evaluation shows our proposed inference engine effectively accelerates sparse DNNs and outperforms CPU solution by up to 4:7x in terms of energy efficiency.

Metrics

1 Record Views

Details

Logo image