Abstract
The paper presents a broadband E/W-band three-stage power amplifier (PA) with high efficiency in 65-nm CMOS technology. Customized neutralization capacitors are used to enhance the gain and stability of the PA. Transformers, coupling lines, and ground planes are co-designed to minimize the insertion loss and circuit areas of passive components, thereby enhancing the gain, output power, and PA efficiency. The measured prototype features a peak gain of 24.6 dB under a 1V power supply, with a 3dB bandwidth from 78.5 to 96.5 GHz. At 85 GHz, the PA provides a saturated output power (P-SAT) of 14.5 dBm and a power-added efficiency (PAE) of 20.5%. The core area of the PA is only 0.05 mm(2), achieving a compact layout.