Abstract
This paper presents low insertion loss, high isolation, ultra wideband (DC to 50 GHz) 2 x 2 switch matrix in a 300mm 0.13 mu m high substrate resistivity trap- rich SOI. The switches are designed by using a series-shunt-series configuration with input and output matching networks. The designed switches achieve a 1.8 dB of low insertion loss and a high isolation of 38 dB up to 50 GHz. 1dB-compression point of designed switches are larger than 19 dBm from DC to 50 GHz. The active chip area of designed 2 x 2 switch matrix is only 0.28 x 0.21 mm(2).