- Title
- Development and characterization of silicon via tapering process for 3D system in packaging application
- Creators - without role
- N. Ranganathan - Nanyang Technological UniversityLiao Ebin - Institute of MicroelectronicsN. Balasubramanian - Institute of MicroelectronicsK. Prasad - Auckland University of TechnologyK. L. Pey - Nanyang Technological University
- Contributors - without role
- S MahapatraM K Radhakrishnan
- Publication Details
- Proceedings of the 14th International Symposium on the Physical & Failure Analysis of Integrated Circuits : IPFA 2007, pp.296-300
- Publisher
- IEEE
- Number of pages
- 2
- Identifiers
- 9914323609846
- Academic Unit
- Engineering Product Development (EPD); Temasek Lab
- Language
- English
- Resource Type
- Conference proceeding
Conference proceeding
Development and characterization of silicon via tapering process for 3D system in packaging application
Proceedings of the 14th International Symposium on the Physical & Failure Analysis of Integrated Circuits : IPFA 2007, pp.296-300
01/01/2007
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