Abstract
The degradation mechanism of breakdown spots in ultrathin gate dielectrics metal-oxide-semiconductor transistor associated with dielectric-breakdown-induced epitaxy (DBIE) evolution is physically analyzed using high resolution transmission electron microscope (HRTEM). The initial soft breakdown location triggered by percolation path happens randomly along the transistor channel, and then evolves to the formation of DBIE in the vicinity of the percolation path. If the breakdown leakage current is not limited, DBIE will grow and the effective breakdown location will successively shift to either source or drain of the transistor channel. For most of the hard breakdown events studied, DBIE eventually shorts the gate electrode to either source or drain region, leading to a typical one-sided hard breakdown seen electrically, which confirms by HRTEM images.