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Low Power High Data Rate GHz Range Receiver in 40nm CMOS Technology
Conference proceeding

Low Power High Data Rate GHz Range Receiver in 40nm CMOS Technology

XiaoPeng Yu, ZhengHao Lu, Wei Meng Lim, Kiat Seng Yeo, Yang Liu, X. L. Yan, Changhui Hu and IEEE
2011 INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC)
IEEE International Conference on Electron Devices and Solid-State Circuits
01/01/2011

Abstract

Engineering Engineering, Electrical & Electronic Physical Sciences Physics Physics, Applied Science & Technology Technology
In this paper, a low power high data rate OOK receiver at GHz range is proposed. An injected locked ring oscillator based local oscillator is used for data demodulation. Implemented with a standard 40nm CMOS process, the receiver is able to recover an input signal with 1-4 GHz carrier frequency at the data rate of 50 Mbps while consuming less than 300 mu W.

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