Abstract
Conference Title: 2014 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Conference Start Date: 2014, June 18 Conference End Date: 2014, June 20 Conference Location: Chengdu, China Content Addressable Memories (CAM) are used extensively in network routers for extremely fast search operation. In the latest Internet Protocol revision (IPv6), each entry has 128 bits (4× longer than 32-bit of IPv4) to provide enough address space for future usage. However, the wider word length of IPv6 standard leads to a substantial increase in sensing delay and power consumption of CAM. This short paper reviews recently published ML sensing schemes, focusing on low-power, high-speed designs implemented in nano-scale CMOS technology.