Abstract
Stress migration (SM) reliability of wide copper (Cu) interconnects with gouging vias was studied using a via chain structure stressed at temperatures ranging from 150 degrees C to 200 degrees C. After a 1000-hour SM test, via chain structures at the edge of the wafer were observed to have extremely high resistance due to the formation of stress-induced voids at the silicon nitride (Si3N4) cap/via interface around the perimeter of the gouging via and at the via bottom. One of the dominant causes for this phenomenon was attributed to the presence of process-induced weak points resulting from poor diffusion barrier layer coverage at the sidewall of the via bottom.