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Symmetrical spiral inductor design and optimization for VCO design in 0.35 mu m CMOS technology
Conference proceeding

Symmetrical spiral inductor design and optimization for VCO design in 0.35 mu m CMOS technology

Y B Choi, T H Teo and H L Liao
2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, Vol.2, pp.1066-1069
01/01/2003

Abstract

Computer Science Computer Science, Hardware & Architecture Engineering Engineering, Electrical & Electronic Engineering, Manufacturing Science & Technology Technology
Optimizing the quality factor of inductor for VCO (voltage control oscillator) application has the added advantages of reducing power consumption and improving the phase noise performance. This work conducts a comprehensive study on a family of symmetrical spiral inductors in standard digital 0.35 mum CMOS process. In addition to quality factor, inductor characteristics of interest include inductor value, peak frequency, (frequency at maximum quality factor) and self-resonance frequency. Experimental result shows minor difference in quality factor by simply stacking tip additional layer of metallization. However, by exciting the symmetrical inductor in differential mode, 60% to 100% improvement of quality factor and peak frequency were observed. This is accompanied by an extension of self-resonant frequency by 10%similar to20% in compare with its single-ended excitation mode. These findings are adopted in the design of a high performance fully integrated differential CMOS VCO at 2.4GHz. The VCO achieves better than -105 dBc/Hz phase noise at 100KHz offset frequency, with a core current consumption of only 4.5mA at 3.0V supply.

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