Abstract
Dual-port SRAMs improve the performance of various hardware accelerators. This paper presents a low voltage 12T dual-port SRAM for biomedical hardware accelerators. The proposed dual-port SRAM cell -decreases the disturbance of the common-row-access mode for improving the worst case stability issue and realizing ultra-low voltage operation. In addition, hierarchical bitlines and a virtual ground technique are employed to further lower the power and minimum operating voltage and power consumption. A 16 Kb 12T dual-port SRAM was fabricated in a 65nm CMOS process technology and showed successful dual-port SRAM operation down to 0.4 V in the common-row-access mode.