Abstract
Semiconductor components, employed in cutting-edge technological devices such as smartphones, tablets and televisions, are used increasingly in our daily lives. Integrated circuits (IC) consist of large numbers of tiny transistors on small semiconductor chips. The process of IC manufacturing can be divided into four major stages: wafer fabrication, wafer sorting, packaging (assembly) and final testing. Over the past four decades, standardization of production processes has been achieved at the first two stages: wafer production and wafer sorting. However, the rising cost of packaging (assembly) and final testing processes, due to various complexities, present an obstacle to the overall cost efficiency of semiconductor production, keeping in mind that consumers demand cheaper technological devices each year. The author identified the major factors that contributed to system complexity at an IC’s final test facility in Singapore. In addition, the relationship between Overall Equipment Effectiveness (OEE) and entropy value of the system was investigated. Lastly, a model for estimating the cost of system complexity was proposed.