Abstract
This thesis provides frameworks for designing dual-band and multi-band LNA to achieve high gain and low power consumption with predictable mathematical equations and step-by-step methodology. Design concepts of low power and high gain concurrent dual-band CMOS LNA for WLAN 2.45 GHz and 5.6 GHz are demonstrated in this thesis. The study includes mathematical equations for input matching and output matching design, stability analysis, and layout design using Cadence Virtuoso with TSMC 40 nm technology nodes process design kits. The simulation results have been done on schematic and physical layouts. The first LNA design attains input reflection (S11) of -18.83 and -22.00 dB, gain (S21) of 19.67 and 16.89, and noise figure (NF) of 3.11 and 3.29 at 2.45 GHz and 5.6 GHz, respectively. The power consumption is 4.51 mW with a supply voltage of 1.1V. Additionally, two more LNAs are designed to enhance the available gain of the second frequency band without consuming extra power. The second and third LNA designs achieve higher gains at 5.6 GHz of 20.08 and 21.97 dB. However, there is a tradeoff with these techniques which is discussed in the thesis. The concept of designing concurrent tri-band LNA which covers 2.45 GHz, 5.6 GHz, and 60 GHz (Wifi IEEE 802.11ax/ad) is included in this thesis and has shown promising results for further study.