Highly efficient convolution neural network chip design using selective convolution layer

Thesis

Huan Huang Tzu

Master of Engineering (Research) , Singapore University of Technology and Design

2022

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Title: Highly efficient convolution neural network chip design using selective convolution layer
Creators - without role: Huan Huang Tzu
Contributors - without role: Tee Hui Teo
I-Chyn Wey
Awarding Institution: Singapore University of Technology and Design; Master of Engineering (Research)
Theses and Dissertations: Master of Engineering (Research) , Singapore University of Technology and Design
Identifiers: 9910583509846
Academic Unit: EPD Pillar
Language: English
Resource Type: Thesis