- Title
- 1.1 V full-swing double bootstrapped BiCMOS logic gates
- Creators - without role
- Y. K Seng - Nanyang Technological UniversityS. S Rofail - Nanyang Technological UniversityKiat Seng Yeo - Office of Provost
- Publication Details
- IEE proceedings. Circuits, devices, and systems, Vol.143(1), pp.41-45
- Publisher
- Institution of Electrical Engineers
- Number of pages
- 5
- Identifiers
- 9911715509846
- Academic Unit
- Office of Provost
- Language
- English
- Resource Type
- Journal article
Journal article
1.1 V full-swing double bootstrapped BiCMOS logic gates
IEE proceedings. Circuits, devices, and systems, Vol.143(1), pp.41-45
1996
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