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6.1 GHz 4.6 mW CMOS divide-by-55/56 prescaler
Journal article   Peer reviewed

6.1 GHz 4.6 mW CMOS divide-by-55/56 prescaler

X. P. Yu, W. M. Lim, M. A. Do, X. L. Yan and K. S. Yeo
Electronics letters, Vol.44(24), pp.1402-1403
20/11/2008

Abstract

Engineering Engineering, Electrical & Electronic Science & Technology Technology
A divide-by-55/56 phase switching prescaler based on odd phase signals is proposed. The odd phase signals for phase switching are generated by a divide-by-7 injection-locked frequency divider. A simple topology with a high operating frequency and a low power consumption is obtained. Implemented with a standard 0.18 mu m CMOS process, the prescaler is able to work from 3.2 to 6.1 GHz with a maximum measured power consumption of 4.6 mW from a 1.8 V supply voltage.

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