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A 11.2 mW 48-62 GHz Low Noise Amplifier in 65 nm CMOS Technology
Journal article   Peer reviewed

A 11.2 mW 48-62 GHz Low Noise Amplifier in 65 nm CMOS Technology

Xiao Peng Yu, Wen Lin Xu, Chen Feng, Zheng Hao Lu, Wei Meng Lim and Kiat Seng Yeo
Circuits, systems, and signal processing, Vol.35(5), pp.1531-1543
01/05/2016

Abstract

Engineering Engineering, Electrical & Electronic Science & Technology Technology
In this paper, a wideband low noise amplifier (LNA) for 60 GHz wireless applications is presented. A single-ended two-stage cascade topology is utilized to realize an ultra-wideband and flat gain response. The first stage adopts a current-reused topology that performs the more than 10 GHz ultra-wideband input impedance matching. The second stage is a cascade common source amplifier that is used to enhance the overall gain and reverse isolation. By proper optimization of the current-reused topology and stagger turning technique, the two-stage cascade common source LNA provides low power consumption and gain flatness over an ultra-wide frequency band with relatively low noise. The LNA is fabricated in Global Foundries 65 nm RFCMOS technology. The measurement results show a maximum gain of 11.4 dB gain with a 3 dB bandwidth from 48 to 62 GHz. Within this frequency range, the measured and are less than 10 dB and the measured DC power consumption is only 11.2 mW from a single 1.5 V supply.

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