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A 4 GHz 60 dB Variable Gain Amplifier With Tunable DC Offset Cancellation in 65 nm CMOS
Journal article   Peer reviewed

A 4 GHz 60 dB Variable Gain Amplifier With Tunable DC Offset Cancellation in 65 nm CMOS

Thangarasu Bharatha Kumar, Kaixue Ma and Kiat Seng Yeo
IEEE microwave and wireless components letters, Vol.25(1), pp.37-39
01/01/2015

Abstract

Engineering Engineering, Electrical & Electronic Science & Technology Technology
This letter presents a compact CMOS based variable gain amplifier with 60 dB gain control range and a feedback reconfigurable dc offset cancellation. The design is a four-stage fully differential cascaded amplifier implemented using a 65 nm CMOS process. The amplifier achieves a current controllable gain range from -39.4 dB to +20.2 dB, a voltage tunable lower cutoff frequency from dc to 200 kHz, a consistent 3 dB bandwidth better than 4 GHz, a maximum dc power consumption of 26 mW, a measured in-band group delay variation of 20 ps, and a noise figure from 10 to 27 dB. The proposed VGA design occupies a compact die area of only 75 mu m 80 mu m (excluding pads for measurement).

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