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A Direct RF Baud Clock Recovery Methodology Based on Super-Regenerative Sample-and-Hold for Low-Cost Real-Time Demodulations
Journal article   Peer reviewed

A Direct RF Baud Clock Recovery Methodology Based on Super-Regenerative Sample-and-Hold for Low-Cost Real-Time Demodulations

Junhong Liu, Guangyin Feng, Yuwen Long, Fanyi Meng and Xiu Yin Zhang
IEEE transactions on circuits and systems. I, Regular papers, pp.1-13
10/11/2025

Abstract

Engineering Engineering, Electrical & Electronic Science & Technology Technology
This paper proposes a direct RF baud clock recovery methodology for low-cost energy-efficient real-time demodulations. A baud clock phase-locked loop (PLL) is proposed to directly extract the baud clock from modulated millimeter-wave signals, which employs a type-I PLL incorporating a baud clock phase detector (BCPD). The BCPD uses a super-regenerative sample-and-hold amplifier (SR-SHA) as a RF sampler and extracts the phase misalignments based on DC components of mixing results between input signals and reconstructed samples. To verify the proposed methodology, a prototype of baud clock recovery circuit with a carrier frequency of 60 GHz was implemented in a 40-nm CMOS process. On-wafer measurement results show that the prototype achieves a baud clock recovery speed of 3.65 Gbaud with an RMS jitter below 0.02 unit interval, demonstrating the ability to provide baud clock recovery for BPSK to 1024-QAM demodulation with a low power consumption of 20.2 mW. By eliminating the needs of oversampling and complex digital signal processing in real-time communications, the proposed methodology provides an energy-efficient and low-cost baud clock recovery solution compared to DSP-based approaches.

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