Algorithm and architecture for a high density, low power scalar product macrocell

Journal article

J GU, C.-H Chang and K.-S Yeo

IEE proceedings. Computers and digital techniques, Vol.151(2), pp.161-172

01/03/2004

Abstract

Applied sciences

Circuit properties

Digital circuits

Electric, optical and optoelectronic circuits

Electronic circuits

Electronics

Exact sciences and technology

Integrated circuits

Integrated circuits by function (including memories and processors)

Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices

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Title: Algorithm and architecture for a high density, low power scalar product macrocell
Creators - without role: J GU - Nanyang Technological University
C.-H Chang - Nanyang Technological University
K.-S Yeo - Nanyang Technological University
Publication Details: IEE proceedings. Computers and digital techniques, Vol.151(2), pp.161-172
Publisher: Institution of Electrical Engineers
Number of pages: 12
Identifiers: 9911718509846
Academic Unit: Office of Provost
Language: English
Resource Type: Journal article