Altering transistor positions : impact on the performance and power dissipation of dynamic latches and flip-flops

Journal article

S. M Mishra, S. S Rofail, Y. K Seng and Kiat Seng Yeo

IEE proceedings. Circuits, devices, and systems, Vol.146(5), pp.279-284

01/10/1999

Abstract

Applied sciences

Design. Technologies. Operation analysis. Testing

Electronics

Exact sciences and technology

Integrated circuits

Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices

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Title: Altering transistor positions : impact on the performance and power dissipation of dynamic latches and flip-flops
Creators - without role: S. M Mishra - Nanyang Technological University
S. S Rofail - Infineon Technologies (Singapore)
Y. K Seng - Nanyang Technological University
Kiat Seng Yeo - Office of Provost
Publication Details: IEE proceedings. Circuits, devices, and systems, Vol.146(5), pp.279-284
Publisher: Institution of Electrical Engineers
Number of pages: 6
Identifiers: 9912387209846
Academic Unit: Office of Provost
Language: English
Resource Type: Journal article