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Computational design of two-dimensional MA2Z4 family field-effect transistor for future Ångström-scale CMOS technology nodes
Journal article   Peer reviewed

Computational design of two-dimensional MA2Z4 family field-effect transistor for future Ångström-scale CMOS technology nodes

Che Chen Tho, Zongmeng Yang, Shibo Fang, Shiying Guo, Liemao Cao, Chit Siong Lau, Fei Liu, Shengli Zhang, Jing Lu, L. K. Ang, …
InfoMat
03/12/2025

Abstract

Materials Science Materials Science, Multidisciplinary Science & Technology Technology
Advancing complementary metal-oxide-semiconductor (CMOS) technology into the sub-1-nm & Aring;ngstr & ouml;m-scale technology nodes is expected to involve alternative semiconductor materials as silicon transistors encounter severe performance degradation at physical gate lengths below 10 nm. Two-dimensional (2D) semiconductors have emerged as strong candidates for overcoming the short-channel effects due to their atomically thin bodies that significantly improves the gate control in aggressively scaled field-effect transistors (FETs). Among the growing library of 2D materials, MAZ family has attracted increasing attention for its remarkable ambient stability, suitable bandgaps, and favorable carrier transport characteristics. While experimental realization of sub-10-nm 2D FETs remains technologically demanding, computational device simulations using first-principles density functional theory combined with nonequilibrium Green's function transport simulations provide a powerful and cost-effective route for assessing the performance limits and optimal design of ultrascaled FET. This review consolidates the current progress in the computational design of MAZ family FETs. We review the physical properties of MoSiN that makes them compelling candidates for transistor applications, and the simulated device performance and optimization strategy of MAZ family FETs. Finally, we discuss the key challenges and research gaps, as well as the future directions of MAZ family FET research toward the & Aring;ngstr & ouml;m-scale CMOS era.image
url
https://doi.org/10.1002/inf2.70096View
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