Delay time sensitivity analysis of multi-generation BiCMOS digital circuits

Journal article

S. S Rofail, Y. K Seng, S. Y Seng and Kiat Seng Yeo

IEE proceedings. Circuits, devices, and systems, Vol.144(2), pp.60-67

1997

Abstract

Applied sciences

Design. Technologies. Operation analysis. Testing

Electronics

Exact sciences and technology

Integrated circuits

Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices

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Title: Delay time sensitivity analysis of multi-generation BiCMOS digital circuits
Creators - without role: S. S Rofail - Nanyang Technological University
Y. K Seng - Nanyang Technological University
S. Y Seng - Nanyang Technological University
Kiat Seng Yeo - Office of Provost
Publication Details: IEE proceedings. Circuits, devices, and systems, Vol.144(2), pp.60-67
Publisher: Institution of Electrical Engineers
Number of pages: 8
Identifiers: 9912388709846
Academic Unit: Office of Provost
Language: English
Resource Type: Journal article