Logo image
Design and Analysis of a WLAN CMOS Power Amplifier Using Multiple-Gated Transistor Technique
Journal article   Peer reviewed

Design and Analysis of a WLAN CMOS Power Amplifier Using Multiple-Gated Transistor Technique

Hang Liu, Chirn Chye Boon, Manh Anh Do and Kiat Seng Yeo
International journal of RF and microwave computer-aided engineering, Vol.21(2), pp.157-163
01/03/2011

Abstract

Computer Science Computer Science, Interdisciplinary Applications Engineering Engineering, Electrical & Electronic Science & Technology Technology
This article focused on 5.2 GHz highly integrated power amplifier for IEEE 802.11a WLAN application. Multiple-gated transistor technique was used to improve linearity. A new approach for choosing the bias voltage of auxiliary transistor by analyzing the shift of gate bias is used in the design. The simulated results of the proposed two-stage differential power amplifier indicate 25.28 dBm P1-dB, 32.87% PAE, and 26.18 dBm saturated output power with a 5.2 dB P1-dB improvement compared to conventional single transistor amplifier. (C) 2011 Wiley Periodicals, Inc. Int J RF and Microwave CAE 21:157-163, 2011.

Metrics

1 Record Views

Details

Logo image