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Dopant-Segregated Schottky Silicon-Nanowire MOSFETs With Gate-All-Around Channels
Journal article   Peer reviewed

Dopant-Segregated Schottky Silicon-Nanowire MOSFETs With Gate-All-Around Channels

Yoke King Chin, Kin-Leong Pey, Navab Singh, Guo-Qiang Lo, Khing Hong Tan, Chio-Yin Ong and L. H. Tan
IEEE electron device letters, Vol.30(8), pp.843-845
01/08/2009

Abstract

Engineering Engineering, Electrical & Electronic Science & Technology Technology
In this letter, we demonstrated dopant-segregated Schottky (DSS) p-MOSFET with gate-all-around silicon-nanowire (SiNW) channel of 10 nm in diameter. The DSS transistor shows improved performance as compared to a reference Schottky barrier (SB) transistor without dopant segregation. The DSS transistor shows I-ON of 319 mu A/mu m at a low gate overdrive of -0.6 V, high I-ON/I-OFF ratio (similar to 10(5)), and short-channel performance with subthreshold slope similar to 90 mV/dec down to 100-nm gate length with relatively thick (6 nm) deposited gate oxide. The DSS transistor also shows significant reduction (similar to 40 x lower) in the series resistance as compared to the SB transistor. The origin of the improved performance of the DSS is the thin dopant layer segregated at the nickel monosilicide/SiNW point contact which results in the enhanced hole injection at the source side and the suppressed electron injection at the drain side.

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