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Effects of post-deposition anneal on the electrical properties of Si3N4 gate dielectric
Journal article   Peer reviewed

Effects of post-deposition anneal on the electrical properties of Si3N4 gate dielectric

W.H. Lin, K.L. Pey, Z. Dong, S.Y.-M. Choi, M.S. Zhou, T.C. Ang, C.H. Ang, W.S. Lau and J.H. Ye
IEEE electron device letters, Vol.23(3), pp.124-126
03/2002

Abstract

Chemicals Hydrogen Leakage current MOSFET circuits Oxidation Rapid thermal annealing Semiconductor films Silicon Spectroscopy Thickness measurement
The effects of postdeposition anneal of chemical vapor deposited silicon nitride are studied. The Si 3 N 4 films were in situ annealed in either H 2 (2%)/O 2 at 950/spl deg/C or N 2 O at 950/spl deg/C in a rapid thermal oxidation system. It is found that an interfacial oxide was grown at the Si 3 N 4 /Si interface by both postdeposition anneal conditions. This was confirmed by thickness measurement and X-ray photoelectronic spectroscopy (XPS) analysis. The devices with H 2 (2%)/O 2 anneal exhibit a lower gate leakage current and improved reliability compared to that of N 2 O anneal. This improvement is attributed to a greater efficiency of generating atomic oxygen in the presence of a small amount of hydrogen, leading to the elimination of structural defects in the as-deposited Si 3 N 4 film by the atomic oxygen. Good drivability is also demonstrated on a 0.12 μm n-MOSFET device.

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