Abstract
We study the mechanism of filamentation in resistive switching (RS) memory from an electrical perspective using a conventional metal-insulator-semiconductor (MIS) high-kappa metal gate transistor test structure and propose the possibility of using the same transistor structure for both logic and RS memory applications. The filament location is measured after every SET transition, and our investigations point to a "pseudorandom" nature of filament nucleation. Migration of highly diffusive nickel from source/drain silicide contacts toward the active silicon channel region transforms the existing MIS stack to MIM, thereby enabling the RS phenomenon.