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Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction
Journal article   Peer reviewed

Fully integrated CMOS fractional-N frequency divider for wide-band mobile applications with spurs reduction

C C Boon, M A Do, K S Yeo and J G Ma
IEEE transactions on circuits and systems. I, Regular papers, Vol.52(6), pp.1042-1048
01/06/2005

Abstract

Engineering Engineering, Electrical & Electronic Science & Technology Technology
A spurs reduction fractional-N frequency divider with a frequency range which is 3.5 times larger than that of a conventional fractional-N divider is presented in this paper. A 1.2-GHz quadrature voltage-controlled oscillator (VCO) is designed as the input source of the frequency divider. The circuit was fabricated using the 0.25-mu m CMOS technology. The power consumption of the frequency divider and the quadrature VCO are 3 and 6 mW, respectively, at a 2-V supply.

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