Impact of 0.25μm dual gate oxide thickness CMOS process on flicker noise performance of multifingered deep-submicron MOS devices

Journal article

K. W Chew, K. S Yeo, S.-F Chu and Y. M Wang

IEE proceedings. Circuits, devices, and systems, Vol.148(6), pp.312-317

01/12/2001

Abstract

Applied sciences

Design. Technologies. Operation analysis. Testing

Electronics

Exact sciences and technology

Integrated circuits

Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices

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Title: Impact of 0.25μm dual gate oxide thickness CMOS process on flicker noise performance of multifingered deep-submicron MOS devices
Creators - without role: K. W Chew - Chartered Semiconductor Manufacturing Ltd., Singapore 738406, Singapore
K. S Yeo - Nanyang Technological University
S.-F Chu - Chartered Semiconductor Manufacturing Ltd., Singapore 738406, Singapore
Y. M Wang - Chartered Semiconductor Manufacturing Ltd., Singapore 738406, Singapore
Publication Details: IEE proceedings. Circuits, devices, and systems, Vol.148(6), pp.312-317
Publisher: Institution of Electrical Engineers
Number of pages: 6
Identifiers: 9912389309846
Academic Unit: Office of Provost
Language: English
Resource Type: Journal article