Abstract
Using nanometer-resolution characterization techniques, we present a study of the local structural and electrical properties of grain boundaries (GBs) in polycrystalline high- Kappa (HK) dielectric and their role on the reliability of underlying interfacial layer (IL). A detailed understanding of this analysis requires characterization of HK/IL dielectrics with nanometer scale resolution. In this work, we present the impact of surface roughness, thickness and GBs containing high density of defects, in polycrystalline HfO sub(2) dielectric on the performance of underlying SiO sub(x) (x [el] 2) IL using atomic force microscopy and simulation (device and statistical) results. Our results show SiO sub(x) IL beneath the GBs and thinner HfO sub(2) dielectric experiences enhanced electric field and is likely to trigger the breakdown of the SiO sub(x) IL.