Impacts of Buffer Oxide Layer in Nitride/Oxide Stack Gate Dielectrics on the Device Performance and Dielectric Reliability

Journal article

W. H. Lin, K. L. Pey, Z. Dong, Victor S. K. Lim, Simon Y. M. Chooi, M. S. Zhou, C. H. Ang, T. C. Ang and W. S. Lau

Electrochemical and solid-state letters, Vol.5(4), pp.F7-F9

01/04/2002

Files and links (1)

url

https://doi.org/10.1149/1.1455824View

Published (Version of record) Open

1 Record Views

Title: Impacts of Buffer Oxide Layer in Nitride/Oxide Stack Gate Dielectrics on the Device Performance and Dielectric Reliability
Creators - without role: W. H. Lin - National University of Singapore
K. L. Pey - Duke-NUS Medical School
Z. Dong - Singapore Institute of Manufacturing Technology
Victor S. K. Lim - Singapore Institute of Manufacturing Technology
Simon Y. M. Chooi - Singapore Institute of Manufacturing Technology
M. S. Zhou - Singapore Institute of Manufacturing Technology
C. H. Ang - Singapore Institute of Manufacturing Technology
T. C. Ang - Singapore Institute of Manufacturing Technology
W. S. Lau - Singapore Institute of Manufacturing Technology
Publication Details: Electrochemical and solid-state letters, Vol.5(4), pp.F7-F9
Identifiers: 9914221009846
Academic Unit: Engineering Product Development (EPD); Temasek Lab
Language: English
Resource Type: Journal article