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Modeling and layout optimization of differential inductors for silicon-based RFIC applications
Journal article   Peer reviewed

Modeling and layout optimization of differential inductors for silicon-based RFIC applications

Choon Beng Sia, Beng Hwee Ong, Wei Meng Lim, Kiat Seng Yeo and Tariq Alam
IEEE transactions on electron devices, Vol.55(4), pp.1058-1066
01/04/2008

Abstract

Engineering Engineering, Electrical & Electronic Physical Sciences Physics Physics, Applied Science & Technology Technology
A scalable RF differential inductor model has been developed, enabling device performance versus layout size trade-offs and optimization as well as accurate circuit predictions. Comparing inductors with identical inductance values up to an operating frequency of 10 GHz, large conductor width designs are found to yield good performance for inductors with small inductance values. As differential inductance or operating frequency increases, interactions between metallization resistive and substrate losses discourage the use of large widths as it consumes silicon area and degrades device performance.

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