Abstract
Coupled switched capacitance causes crosstalk in ultra deep submicron/nanometer VLSI fabrication, which leads to power dissipation, delay faults, and logical malfunctions. We present the first memoryless transition bus-encoding technique for power minimization, error-correction, and elimination of crosstalk simultaneously. To accomplish this, we generalize balanced sampling plans avoiding adjacent units, which are widely used in the statistical design of experiments. Optimal or asymptotically optimal constant weight codes eliminating each kind of crosstalk are constructed.