Abstract
The physical analysis of the ultrathin gate oxides (33 and 25 Å) after the electrical stressing, under constant voltage stress, reveals that the damage is not only limited to the oxide layer, but also to the entire gate structure. The hard breakdown failure makes catastrophic damage to the structure, whereas the analysis of soft breakdown failure reveals many of the hidden damages in the device structure. In Ti-silicided structures, the predominant failure mechanism is Ti migration to form a leakage path, as well as localized re-crystallisation of poly-Si or Si substrate near to the gate oxide. Co migration is so far not seen in Co-silicided devices. However, even for the very low current compliance levels and devices which do not show any electrical degradation after the SBD stress, localized epitaxy formation in the gate or Si substrate is observed, which could be a reliability concern.