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RF CMOS low-phase-noise LC oscillator through memory reduction tail transistor
Journal article   Peer reviewed

RF CMOS low-phase-noise LC oscillator through memory reduction tail transistor

C.C. Boon, M.A. Do, K.S. Yeo, J.G. Ma and X.L. Zhang
IEEE transactions on circuits and systems. II, Express briefs, Vol.51(2), pp.85-90
01/02/2004

Abstract

1f noise FETs MOS devices MOSFETs Oscillators Phase noise Radio frequency Silicon Tail Topology
Based on the understanding of flicker noise generation in "silicon metal-oxide semiconductor field-effect transistors" (MOSFETs), a novel method for improving the phase noise performance of a CMOS LC oscillator is presented. Zhou et al. and Hoogee have suggested that the 1/f noise can be reduced through a switched gate, and the flicker noise generated is inversely proportional to the gate switching frequency. The novel tail transistor topology is compared to the two popular tail transistor topologies, namely, the fixed biasing tail transistor and without tail transistor. Through this technique, a figure of merit of 193 dB is achieved using a fully integrated CMOS oscillator with a tank quality factor of about 9.

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