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Reduction of carrier depletion in p/sup +/ polysilicon gates using laser thermal processing
Journal article   Peer reviewed

Reduction of carrier depletion in p/sup +/ polysilicon gates using laser thermal processing

Y.F. Chong, H.-J.L. Gossmann, M.O. Thompson, K.L. Pey, A.T.S. Wee, S. Talwar and L. Chan
IEEE electron device letters, Vol.24(5), pp.360-362
05/2003

Abstract

Atomic beams Atomic measurements Boron Implants Mass spectroscopy MOS capacitors Rapid thermal annealing Rapid thermal processing Silicon Thermal degradation
A novel laser thermal processing (LTP) technique was used to fabricate p/sup +/-gated MOS capacitors with ultrathin gate oxides. It is found that the introduction of LTP prior to the gate activation anneal increases the carrier concentration at the poly-Si gate/gate oxide interface substantially, as compared to rapid thermal anneal (RTA) alone. Thus, LTP readily reduces the poly-depletion effect in p/sup +/-poly-Si gates. This is achieved without observable gate oxide degradation or boron penetration. Secondary ion mass spectrometry analyzes show that the boron concentration near the gate/gate oxide interface increases significantly after the post-LTP anneal. A possible mechanism for this increase in carrier concentration is the diffusion of boron atoms toward the gate oxide by a complex process known as explosive crystallization.

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