Abstract
A novel successive multi-stage compliance ramp voltage sweep (MSC-RVS) methodology is proposed to investigate the forward gate breakdown mechanism in enhancement-mode p-GaN high-electron-mobility transistors (HEMTs). The MSC-RVS methodology allows the observation of various gate breakdown (BD) mechanisms associated with GaN in a single stress schema. In the MSC-RVS methodology, the gate current compliance ( I_{comp} ) is gradually increased, and multiple BD events are repeatedly initiated along the Schottky, Passivation, and PiN regions. Existing reliability studies are generally based on constant / step voltage stress (AC/DC) at single compliance (which is usually high at 1-10mA), which results in the cascaded coupling of multiple failure mechanisms. It is impossible to differentiate the different failure regimes observed in the HEMT device and their specific local regions (e.g., near Gate/Source/Drain) of origin in the traditional test schema. Our analysis reveals that when I_{comp} is low (0.1-1 mA), Schottky region BD is first observed, and subsequently when I_{comp} is in the medium to high range of 1-10 mA, passivation and PiN-related BD events occur. Most tested devices show that failures occur in a sequence, with Schottky followed by Passivation and PiN BD. Electric field (E-field) simulations using TCAD are used to pinpoint the exact failure region. Simulations show that Schottky BD occurs at the Schottky metal / p-GaN interface and the passivation BD at the Schottky metal/dielectric and p-GaN sidewall/dielectric region. The PiN failure originates at the p-GaN edge / AlGaN over-etch region. The BD phenomenon evolves from soft to hard breakdown, which is seldom observed in other studies, enabled by our careful MSC-RVS methodology. Finally, EMMI/TiVA electrical failure analysis (EFA) data are also investigated to validate our hypothesis of the failure-prone locations at room temperatures.